Exploring Lab 6 Stopwatch

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  • Lab 6: FSM synthesis - Design of a stopwatch
  • Umar Choudry uzc56 #17220 Mihir Ali mma3585 #17235 EE316 Spring 2022.
  • Basys 3 FPGA development board Group members: Zahid Hossain & Noah Zamarripa.
  • ECE520
  • ECE520

In-Depth Information on Lab 6 Stopwatch

Lab 6 Stopwatch/Timer 316 using 18-bit COUNT in slow clk divider instead of 19 bits in this demo video to make it faster. Otherwise, frequency should be ... Lab 6 Stopwatch 0:00

Video Demonstration : LAB 6 - TIMER

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